In the existing manufacturing process of the thin film transistor liquid crystal display (TFT-LCD), failures such as a line fault and the like often occur due to e.g. a mechanical breakdown or an artificial mistake. The line fault generally results from an open circuit outside the pixel region (i.e. the non-display region) or a short circuit inside the pixel region (i.e. the display region). The open circuit outside the pixel region may be pinpointed by a line patrol via a microscope. The short circuits inside the pixel region may be categorized into ones caused by particles and ones between films, wherein the location of a particle-caused short circuit can be observed by a line patrol via human eyes, while the location of a short circuit between films, especially that of a Gate line-Common electrode Short circuit (GCS) or a Data line-Common electrode Short circuit (DCS), cannot be observed either by human eyes or by a microscope. Therefore, the existing schemes for line fault localization are unable to accurately determine the location of a short circuit between films.